Coarse-grained Logic Interface with Floating-point Arithmetic Unit: A Review

Authors

  • Devendra Singh Thakur
  • Sunil Kumar Shah
  • Sateesh Kourav
  • Anoop Kumar Dubey
  • Yashwant Singh

Keywords:

Reduced instruction set computer, field programmable gate array, floating point unit, EDA, arithmetic unit

Abstract

One of the key elements of their design, which has a substantial impact, is their choice of programmable connectivity and logic capabilities. The FPGA architecture has a significant impact on the speed performance, space efficiency, and power consumption of the finished device. This examination examines the evolution of programmable logic devices over time, the underlying programming paradigms that underpin programmability, and the most important findings from architectural system research. We provide a description of the essential aspects of current commercial FPGA architecture while keeping new developments in mind. FPGA device performance and system integration have greatly improved, but new problems have emerged. To avoid these issues and take advantage of increased microprocessor density, the FPGA architecture must be modified. This analysis examines the most current advances in advanced FPGA topologies, including advancements in programming methodologies, logic building blocks, interconnects, and embedded resources. Furthermore, several major new design issues for FPGA designs, such as cutting-edge memory-based and 3D FPGAs, are studied to offer context.

References

Sangkhapan S, Wannapiroon P, Nilsook P. Development of Smart Bus Management System Using NB-IoT. In 2021 IEEE 3rd International Conference on Computer Communication and the Internet (ICCCI). 2021 Jun 25; 152–156.

Kumari M, Kumar A, Khan A. IoT based intelligent real-time system for bus tracking and monitoring. In 2020 IEEE International Conference on Power Electronics & IoT Applications in Renewable Energy and its Control (PARC). 2020 Feb 28; 226–230.

Shah MJ, Prasad RP, Singh AS. IOT based smart bus system. In 2020 IEEE 3rd International Conference on Communication System, Computing and IT Applications (CSCITA). 2020 Apr 3; 130–134.

Larionov AA, Ivanov RE, Vishnevsky VM. UHF RFID in automatic vehicle identification: Analysis and simulation. IEEE J Radio Freq Id. 2017 Mar; 1(1): 3–12.

Shree AD, Anusuya J, Malathy S. Real time bus tracking and location updation system. In 2019 IEEE 5th International Conference on Advanced Computing & Communication Systems (ICACCS). 2019 Mar 15; 242–245.

Kamble PA, Vatti RA. Bus tracking and monitoring using RFID. In 2017 4th IEEE International Conference on Image Information Processing (ICIIP). 2017 Dec 21; 1–6.

Arnold MG, Paliouras V, Kouretas I. Implementing the Residue Logarithmic Number System Using Interpolation and Co-transformation. IEEE Trans Comput. 2019 Jul 23; 69(12): 1719–32.

Rao RP, Rao ND, Naveen K, Ramya P. Implementation of the standard floating point MAC using IEEE 754 floating point adder. In 2018 2nd IEEE International Conference on Computing Methodologies and Communication (ICCMC). 2018 Feb 15; 717–722.

Varunkumar J, Anusha R, Shreenidhi S, Vishwas S. Advanced verification of Single precision floating point ALU. In 2019 IEEE 1st International Conference on Advanced Technologies in Intelligent Control, Environment, Computing & Communication Engineering (ICATIECE). 2019 Mar 19; 365–368.

Burud A, Bhaskar P. Design and Implementation of FPGA Based 32 Bit Floating Point Processor for DSP Application. In 2018 IEEE 4th International Conference on Computing Communication Control and Automation (ICCUBEA). 2018 Aug 16; 1–5.

Downloads

Published

2023-09-27

Issue

Vol. 11 No. 2 (2023)

Section

Articles

License

Declaration and Copyright Transfer Form

(to be completed by authors)

I/ We, the undersigned author(s) of the submitted manuscript, hereby declare, that the above manuscript which is submitted for publication in the STM Journals(s), is not published already in part or whole (except in the form of abstract) in any journal or magazine for private or public circulation, and, is not under consideration of publication elsewhere.

  • I/We will not withdraw the manuscript after 1 week of submission as I have read the Author Guidelines and will adhere to the guidelines.
  • I/We Author(s ) have niether given nor will give this manuscript elsewhere for publishing after submitting in STM Journal(s).
  • I/ We have read the original version of the manuscript and am/ are responsible for the thought contents embodied in it. The work dealt in the manuscript is my/ our own, and my/ our individual contribution to this work is significant enough to qualify for authorship.
  •  I/We also agree to the authorship of the article in the following order:

Author’s name                                    

 

1. ________________

2. ________________

3. ________________

4. ________________

 

We  Author(s) tick this box and would request you to consider it as our signature as we agree to the terms of this Copyright Notice, which will apply to this submission if and when it is published by this journal.