Design of Folded Cascode Amplifier for SCL 180 nm Technology Node for Low Power Applications

Abstract

In this paper, a design and simulations of a Folded Cascode Amplifier at an SCL 180 nm Technology has been done and the different way to implement the design for a given specification has also been clearly demonstrated. The given design also clearly indicates the way to improve the various design parameters for a given specification of a circuit at this node. The way to reduce the power dissipation of the design has been also clearly shown and along with its impact on the gain of the design. Also, the bandwidth of the final design is found to be in the acceptable range and the overall design has been improved. The circuit has been simulated using Cadence Virtuoso and the various calculations were done using MATLAB.

Keywords: Folded Cascode Amplifier, Power Dissipation, Bandwidth, Gain

Cite this Article: Rajiv Ranjan Thakur, Pragati Singh, Chaitali Koley. Design of Folded Cascode Amplifier for SCL 180 nm Technology Node for Low Power Applications. Journal of Network Security. 2020; 8(1): 22–31p.