Open Access Open Access  Restricted Access Subscription Access

Study and Analysis of Delay Faults of Embedded Processor using Dynamic Voltage Scaling Methods

E. N. Ganesh


Voltage over-scaling has been a possibility for energy dependability compromise. This research will look into its effectiveness and the potential for rationale deferral flaws. Our contextual investigation on an ARM Cortex-M0 processor with business 45 nm libraries shows that the quantity of defer deficiencies increments decisively after the principal bombing working point which infers that voltage overscaling will be wasteful after the basic working point. This recommends the need of the observing plans for following the basic working point. Distributed voltage scaling methods employ the methodology of distributing voltage to the circuits uniformly and when needed. Dynamic voltage scaling methods give voltage to the required portion and when needed that can be utilized or not. Hence dynamic changes happen automatically over the part of the region. Scaling the voltage in dynamical manner for the required circuits is performed and remaining can disconnect from their operations. Voltage overscaling can be performed over energy dependable circuits. Hence the deficiency in the energy distribution over the needed circuits can be rectified effectively. In this context, the clock period and energy from the clock to the circuit regions having delay faults are rectified using the proposed dynamic voltage scaling methods.


Embedded system, voltage scaling, delay faults, ARM processor and microcontroller

Full Text:



Kahng AB, Kang S, Kumar R, Sartori J. Slack redistribution for graceful degradation under voltage overscaling. In 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC), IEEE. 2010; 825–831.

Hegde R, Shanbhag NR. Energy-efficient signal processing via algorithmic noise-tolerance. In Proceedings of the 1999 international symposium on Low power electronics and design, ACM. 1999; 30–35.

Austin T, Bertacco V, Blaauw D, Mudge T. Opportunities and challenges for better than worst-case design. In Proceedings of the 2005 Asia and South Pacific Design Automation Conference. ACM. 2005; 2–7.

Tokunaga C, Ryan JF, Karnik T, Tschanz JW. Resilient and adaptive circuits for voltage, temperature, and reliability guardband reduction. In IEEE International Reliability Physics Symposium. 2014 Jun; 3D.3.1–3D.3.5.

Liu Y, Zhang T, Parhi KK. Computation error analysis in digital signal processing systems with overscaled supply voltage. IEEE Trans Very Large Scale Integr (VLSI) Syst. 2010; 18(4): 517–526.

Patel J. CMOS process variations: A critical operation point hypothesis. In Online Presentation. 2008.

Arm Developer. ARM Cortex-M0. [Online]. Available: cortex-m/cortex-m0.php

Cadence. Cadence RTL compiler. [Online]. Available: compiler/pages/default.aspx

Cadence encounter. Products: Integrated design and verification technologies and methodologies for chips to packages to boards to systems. [Online]. Available from

Synopsys. Industry’s Highest Performance Simulation Solution [Online]. Available from

Ganesh EN. Implementation of digital notice board using raspberry Pi and IoT. Oriental J Comput Sci Technol. 2019; 12(1): 14–20. DOI:10.13005/ojcst12.01.04

Stella K, Ganesh EN. On-Demand Customizable Sensor Based Opportunistic Multipath Secure Routing Using Coalition Game Theory. Asian J Res Soc Sci Humanit. 2017; 7(3): 169–189. DOI:10.5958/2249-7315.2017.00164.2

Ganesh EN. Wireless Sensor Network: The Challenges of Design and Programmability. International Journal of Telecommunications & Emerging Technologies (IJTET). 2017; 3(1): 23–34. DOI:10.6084/m9.figshare.19487915

Ganesh EN. Design of Image by Morphological Dilation Technique using Xilinx tool on FPGA. Int J Innov Res Multidiscip Field. 2016; 2(10): 618–621. DOI: 10.6084/m9.figshare.19608105

Ganesh EN. Comparison of Bit Plane Complexity Segmentation and Discrete Cosine Transform Technique for Stegnography. International Journal for Scientific Research & Development (IJSRD). 2016; 4(9): 434–438.

Guthaus Matthew R, Ringenberg Jeffrey S, et al. MiBench: A free, commercially representative embedded benchmark suite. [Online]. Available from


  • There are currently no refbacks.

Copyright (c) 2022 Research & Reviews: A Journal of Embedded System & Applications