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A Survey of Queuing and Scheduling Mechanism of Input-queued Switches

D. Raghupathikumar, Dr. K. BommannaRaja

Abstract


ABSTRACT
High-speed routers play an important role in the Internet. A main hindrance to high-speed router design is its switch architecture. It concerns with how packets are moved from switch input ports to output ports. The switch architecture can be classified as Output-Queued and Input-Queued switches. It is well known that Output-Queued switches can achieve optimal delay-throughput performance. Output-queued switches are generally impractical for high-speed implementation because of high speed needed for both switch fabric and output port buffers. Input-queued switch architecture becomes the alternative since it needs no (or little) speedup. Input queuing is becoming increasingly used for high bandwidth switches and routers. In an input-queued switch, each input port can send at most one packet and each output port can at most receive one packet in each time slot. In VOQ each input port maintains a separate queue for each output port. It has been shown that VOQ can achieve 100% throughput performance with an effective scheduling algorithm. It addresses a common problem known as Head-Of-Line (HOL) blocking. The scheduling problem is equivalent to the matching problem in a bipartite graph.

Keywords: Scheduling, Queuing, Matching, Bipartite, Switch-fabric


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